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99dB Stereo DAC
DESCRIPTION
WM8725 is a high-performance stereo DAC designed for use in portable audio equipment, video CD players and 2 similar applications. It comprises selectable normal or I S compatible serial data interfaces for 16 to 24-bit digital inputs, high performance digital filters, and sigma-delta output DACs, achieving an excellent 99dB signal-to-noise performance. The device is available in a 14-pin SOIC package that offers selectable mute and de-emphasis functions using a minimum of external components.
WM8725
FEATURES
* * * * * * * * 99dB SNR performance Stereo DAC with input sampling from 8kHz to 96kHz Additional mute feature Normal or I2S compatible data format Sigma-delta design with 64x oversampling System clock 256fs or 384fs Supply range 3V to 5V 14-pin SOIC package
APPLICATIONS
* * Portable audio equipment Video CD players
BLOCK DIAGRAM
WOLFSON MICROELECTRONICS PLC
www.wolfsonmicro.com
Production Data, August 2004, Rev 4.1
Copyright 2004 Wolfson Microelectronics plc.
WM8725 TABLE OF CONTENTS
Production Data
DESCRIPTION ................................................................................................................1 FEATURES......................................................................................................................1 APPLICATIONS ..............................................................................................................1 BLOCK DIAGRAM ..........................................................................................................1 TABLE OF CONTENTS ..................................................................................................2 PIN CONFIGURATION....................................................................................................3 ORDERING INFORMATION ...........................................................................................3 ABSOLUTE MAXIMUM RATINGS..................................................................................4 RECOMMENDED OPERATING CONDITIONS ..............................................................4 ELECTRICAL CHARACTERISTICS ...............................................................................5 PIN DESCRIPTION .........................................................................................................6 DEVICE DESCRIPTION..................................................................................................7
INTRODUCTION .....................................................................................................................7 DAC CIRCUITS .......................................................................................................................7 SERIAL DATA INTERFACE ....................................................................................................8 SYSTEM CLOCK ....................................................................................................................9
RECOMMENDED EXTERNAL COMPONENTS ...........................................................10
DETAIL OF RECOMMENDED EXTERNAL COMPONENTS SHOWING THE EXTERNAL LOW PASS FILTER ..............................................................................................................10 PCB LAYOUT........................................................................................................................10
PACKAGE DIMENSIONS .............................................................................................11 IMPORTANT NOTICE ...................................................................................................12
ADDRESS: ............................................................................................................................12
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WM8725
Production Data
PIN CONFIGURATION
LRCIN DIN BCKIN NC CAP VOUTR GND
1 2 3 4 5 6 7
14 13
SCKI FORMAT DEEMPH NC MUTE VOUTL VDD
WM8725
12 11 10 9 8
ORDERING INFORMATION
DEVICE WM8725ED WM8725ED/R WM8725GED/V WM8725GED/RV TEMPERATURE RANGE -25 C to +85 C -25oC to +85oC -25oC to +85oC -25oC to +85oC
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PACKAGE 14-pin SOIC 14-pin SOIC (tape and reel) 14-pin SOIC (lead free) 14-pin SOIC (lead free tape and reel)
MOISTURE SENSITIVITY LEVEL MSL1 MSL1 MSL2 MSL2
PEAK BODY TEMPERATURE 240 C 240oC 260oC 260oC
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Note: Reel quantity: 3,000
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WM8725 ABSOLUTE MAXIMUM RATINGS
Production Data
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage conditions prior to surface mount assembly. These levels are: MSL1 = unlimited floor life at <30C / 85% Relative Humidity. Not normally stored in moisture barrier bag. MSL2 = out of bag storage for 1 year at <30C / 60% Relative Humidity. Supplied in moisture barrier bag. MSL3 = out of bag storage for 168 hours at <30C / 60% Relative Humidity. Supplied in moisture barrier bag. The Moisture Sensitivity Level for each package type is specified in Ordering Information. CONDITION Supply voltage Reference input Operating temperature range, TA Storage temperature Lead temperature (soldering, 10 seconds) Lead temperature (soldering, 2 minutes) -25 C -65 C
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MIN -0.3V
MAX +7.0V VCC+0.3V +85 C +150 C +240 C +183 C
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RECOMMENDED OPERATING CONDITIONS
PARAMETER Supply Range Ground Supply Current SYMBOL VDD GND VDD = 5V VDD = 3V TEST CONDITIONS MIN -10% TYP 3.0 to 5.0 0 15 7.5 25 MAX +10% UNIT V V mA mA
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WM8725 ELECTRICAL CHARACTERISTICS
Test Conditions VDD = 5V, GND = 0V, TA = +25 C, fs = 48kHz, SCKI = 256fs unless otherwise stated. PARAMETER Digital Logic Levels Input LOW level Input HIGH level Analogue Output Levels Load Resistance To midrail or AC coupled (5V supply) To midrail or AC coupled (3V supply) Maximum capacitance load Output DC level Reference Levels Potential divider resistance Voltage at CAP DAC Circuit Specifications SNR (Note 1) Full scale output voltage THD (Full scale) THD+N (Dynamic range) Frequency response Transition band Out of band rejection Channel Separation Gain mismatch channel-to-channel Audio Data Input and System Clock Timing Information BCKIN pulse cycle time BCKIN pulse width high BCKIN pulse width low BCKIN rising edge to LRCIN edge LRCIN rising edge to BCKIN rising edge DIN setup time DIN hold time System clock pulse width high System clock pulse width low Notes: 1. 2. tBCY tBCH tBCL tBL tLB tDS tDH tSCKIH tSCKIL 100 50 50 30 30 30 30 13 13 VDD = 5V VDD = 3V Into 10kohm VDD = 5V, 0dB Into 10kohm VDD = 3V, 0dB 0dB -60dB 0 20,000 -40 90 1 5 0.9 90 99 97 1.0 0.6 0.01 92 0.02 1.1 VDD to CAP and CAP to GND VDD = 5V 80 2.3 100 2.5 120 2.7 5V or 3V 1 1 100 VDD/2 VIL VIH 2.0 0.8 SYMBOL TEST CONDITIONS MIN TYP MAX
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Production Data
UNIT V V k k pF V k V dB dB VRMS VRMS % dB Hz Hz dB dB %FSR
20,000
ns ns ns ns ns ns ns ns ns
Ratio of output level with 1kHz full scale input, to the output level with all zeros into the digital input, measured "A" weighted over a 20Hz to 20kHz bandwidth. All performance measurements done with 20kHz low pass filter. Failure to use such a filter will result in higher THD+N and lower SNR and Dynamic Range readings than are found in the Electrical Characteristics. The low pass filter removes out of band noise; although it is not audible, it may affect dynamic specification values.
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WM8725 PIN DESCRIPTION
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 NAME LRCIN DIN BCKIN NC CAP VOUTR GND VDD VOUTL MUTE NC DEEMPH FORMAT SCKI TYPE Digital input Digital input Digital input No connect Analogue output Analogue output Supply Supply Analogue output Digital input No connect Digital input Digital input Digital input Sample rate clock input Serial data input Bit clock input No internal connection Analogue internal reference Right channel DAC output 0V supply Positive supply Left channel DAC output Mute control, high = muted. Internal pull-down No internal connection DESCRIPTION
Production Data
De-emphasis select, high = de-emphasis ON. Internal pull-up Data input format select, low = normal, high = I2S. Internal pull-up System clock input (256fs or 384fs)
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WM8725 DEVICE DESCRIPTION
INTRODUCTION
Production Data
WM8725 is a complete stereo audio 16-24 bit digital-to-analogue converter, including digital interpolation filter, multibit sigma-delta with dither, and switched capacitor multibit stereo DAC and output smoothing filters. Special functions of mute and de-emphasis are provided, and operation using system clock of 256fs or 384fs is provided, selection between either clock rate being automatically controlled. Sample rates (fs) from less than 8ks/s to 96ks/s are allowed, provided the appropriate system clock is input. MUTE 0 1 Table 1 Mute Control A novel multi bit sigma-delta DAC design is used, utilising a 64x oversampling rate, to optimise signal to noise performance and offer increased clock jitter tolerance. Internally generated midrail references are used to DC bias output signals, requiring only a single external capacitor for decoupling purposes. Single 3V to 5V supplies may be used, the output amplitude scaling with absolute supply level. Low supply voltage operation and low current consumption, and the low pin count small package, make the WM8725 attractive for many consumer type applications. DESCRIPTION Mute is OFF Mute is ON
DAC CIRCUITS
The WM8725 DACs are designed to allow playback of 16-bit PCM audio or similar data with high resolution and low noise and distortion. Sample rates up to 96ks/s may be used, with much lower sample rates acceptable provided that the ratio of sample rate (LRCIN) to system clock is maintained at the required 256fs or 384fs times. The DACs on WM8725 are implemented using sigma-delta oversampled conversion techniques. These require that the PCM samples are digitally filtered and interpolated to generate a set of samples at a much higher rate than the 96ks/s input rate. This sample stream is then digitally modulated to generate a digital pulse stream that is then converted to analogue signals in a switched capacitor DAC. The advantage of this technique is that the DAC is linearised using noise shaping techniques, allowing the full performance to be met using non-critical analogue components. A further advantage is that the high sample rate at the DAC output means that smoothing filters on the output of the DAC need only have fairly crude characteristics in order to remove the characteristic steps, or images, on the output of the DAC. To ensure that generation of tones characteristic to sigma-delta convertors is not a problem, dithering is used in the digital modulator and a higher order modulator is used. The switched capacitor technique used in the DAC reduces sensitivity to clock jitter compared to switched current techniques used in other implementations. De-emphasis of 44.1kHz signals may be applied if required. DEEMPH 0 1 DESCRIPTION De-emphasis is OFF De-emphasis is ON
Table 2 De-emphasis Control The voltage on the CAP pin is used as the reference for the DACs, therefore the amplitude of the signals at the DAC outputs will scale with the amplitude of the voltage at the CAP. An external reference could be used to drive into the CAP pin if desired, but a value typically of about midrail should be used for optimum performance.
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WM8725
Production Data The outputs of the 2 DACs are buffered out of the device by buffer amplifiers. These amplifiers will source load current of several mA and sink current up to 1.5mA, so allowing significant loads to be driven. The output source is active and the sink is Class A, i.e. fixed value, so greater loads might be driven if an external `pull-down' resistor is connected at the output. Typically an external low pass filter circuit will be used to remove residual sampling noise of the 64x oversampling used and if desired adjust the signal amplitude and device strength.
SERIAL DATA INTERFACE
WM8725 has serial interface formats that are fully compatible with both normal (MSB first, right-justified) and I2S interfaces. The data format is selected with the FORMAT pin. When FORMAT is LOW, normal data format is selected. When the format is HIGH, I2S format is selected. It must be noted that in "packed" mode operation (exactly 32 BCLKs per LRCIN period), the data word must align exactly with LRCIN clock edges (effectively both left and right justified at the same time). This is true in both normal and I2S modes. FORMAT 0 1 DESCRIPTION Normal format (MSB-first, right justified) I2S format (Philips serial data protocol)
Table 3 Serial Interface Formats
1/fs
LEFT CHANNEL LRCIN
RIGHT CHANNEL
BCKIN Audio Data Word = 16-Bit DIN 1 MSB 2 3 14 15 16 LSB 1 2 3 14 15 16 LSB
MSB
Figure 1 `Normal' Data Input Timing
1/fs
LEFT CHANNEL LRCIN
RIGHT CHANNEL
BCKIN Audio Data Word = 16-Bit DIN 1 MSB 2 3 14 15 16 LSB 1 2 3 14 15 16 LSB
MSB
Figure 2 I2S Data Input Timing
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WM8725
SYSTEM CLOCK
Production Data
The system clock is used to operate the digital filters and the noise shaping circuits. The system clock input is at pin 14 (SCKI). The frequency of WM8725's system clock should be set to 256fs or 384fs, (where fs is the audio sampling frequency). The sample rate is typically: 32 kHz, 44.1 kHz, 48 kHz or 96kHz. WM8725 has a system clock detection circuit that automatically determines whether the system clock being supplied is at 256fs or 384fs. The system clock should be synchronised with LRCIN, but WM8725 is tolerant of phase differences. Severe distortion in the phase difference between LRCIN and the system clock will be detected, and cause the device to automatically resynchronise. During resynchronisation, the output of the device will either repeat the previous sample, or drop the next sample, depending on the nature of the phase slip. This will ensure minimal "click" at the analogue outputs during resynchronisation.
tSCKIL SCKI tSCKIH
Figure 3 System Clock Timing Requirements SAMPLING RATE (LRCIN) 32 kHz 44.1 kHz 48 kHz 96kHz SYSTEM CLOCK FREQUENCY (MHz) 256fs 8.192 11.2896 12.288 24.5761 384fs 12.288 16.9340 18.432 36.8641
Table 4 System Clock Frequencies Versus Sampling Rate Notes: 1. 96kHz sample rate at either 256fs or 384fs are only supported with 5V supplies.
LRCIN tBCH BCKIN tBCY tBCL tLB
tBL
DIN tDS tDH
Figure 4 Audio Data Input Timing
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WM8725 RECOMMENDED EXTERNAL COMPONENTS
1
Production Data
LRCIN DIN BCKIN NC CAP VOUTR GND
SCKI FORMAT DEEMPH
14
256fs/384fs CLK
FROM AUDIO PROCESSOR
2
13
3
12
4
WM8725
NC MUTE VOUTL VDD
11
10F ANALOGUE OUTPUT FOR RIGHT CHANNEL
+
5
10
External LPF
6
9
External LPF
7
8
ANALOGUE OUTPUT FOR LEFT CHANNEL
GND
10F
0.1F
VDD
Figure 5 Recommended External Components
DETAIL OF RECOMMENDED EXTERNAL COMPONENTS SHOWING THE EXTERNAL LOW PASS FILTER
External LPF
x2 for Stereo Operation
VOUTR VOUTL 10k 10k 680pF
1500pF 10k
+
100pF
Filtered Analogue Output
Figure 6 Third-Order Low Pass Filter (LPF) Example An external low pass filter is recommended (see Figure 6) if the device is driving a wideband amplifier. In some applications, second-order or passive RC filter may be adequate.
PCB LAYOUT
1. 2. 3. Place all supply decoupling capacitors as close as possible to their respective supply pins and provide a low impedance path from the capacitors to the appropriate ground. Separate analogue and digital ground planes should be situated under respective analogue and digital device pins. Avoid noise on the CAP reference pin. The decoupling capacitor should be placed as close to this pin as possible with a low impedance path from the capacitor to analogue ground. Digital input signals should be screened from each other and from other sources of noise to avoid cross-talk and interference. They should also run over the digital ground plane to avoid introducing unwanted noise into the analogue ground plane. Analogue output signal tracks should be kept as short as possible and over the analogue ground plane reducing the possibility of losing signal quality.
4.
5.
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WM8725 PACKAGE DIMENSIONS
D: 14 PIN SOIC 3.9mm Wide Body
Production Data
DM001.C
e
B
14
8
H E
1
7
D
L h x 45o
A1 -CA
SEATING PLANE
C
0.10 (0.004)
Symbols A A1 B C D E e H h L REF:
Dimensions (MM) MIN MAX 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 8.55 8.75 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.27 0o 8o JEDEC.95, MS-012
Dimensions (Inches) MIN MAX 0.0532 0.0688 0.0040 0.0098 0.0130 0.0200 0.0075 0.0098 0.3367 0.3444 0.1497 0.1574 0.05 BSC 0.2284 0.2440 0.0099 0.0196 0.0160 0.0500 0o 8o
NOTES: A. ALL LINEAR DIMENSIONS ARE IN MILLIMETERS (INCHES). B. THIS DRAWING IS SUBJECT TO CHANGE WITHOUT NOTICE. C. BODY DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSION, NOT TO EXCEED 0.25MM (0.010IN). D. MEETS JEDEC.95 MS-012, VARIATION = AB. REFER TO THIS SPECIFICATION FOR FURTHER DETAILS.
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WM8725 IMPORTANT NOTICE
Production Data
Wolfson Microelectronics plc (WM) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current. All products are sold subject to the WM terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.
WM warrants performance of its products to the specifications applicable at the time of sale in accordance with WM's standard warranty. Testing and other quality control techniques are utilised to the extent WM deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.
In order to minimise risks associated with customer applications, adequate design and operating safeguards must be used by the customer to minimise inherent or procedural hazards. Wolfson products are not authorised for use as critical components in life support devices or systems without the express written approval of an officer of the company. Life support devices or systems are devices or systems that are intended for surgical implant into the body, or support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided, can be reasonably expected to result in a significant injury to the user. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
WM assumes no liability for applications assistance or customer product design. WM does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of WM covering or relating to any combination, machine, or process in which such products or services might be or are used. WM's publication of information regarding any third party's products or services does not constitute WM's approval, license, warranty or endorsement thereof.
Reproduction of information from the WM web site or datasheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations and notices. Representation or reproduction of this information with alteration voids all warranties provided for an associated WM product or service, is an unfair and deceptive business practice, and WM is not responsible nor liable for any such use.
Resale of WM's products or services with statements different from or beyond the parameters stated by WM for that product or service voids all express and any implied warranties for the associated WM product or service, is an unfair and deceptive business practice, and WM is not responsible nor liable for any such use.
ADDRESS:
Wolfson Microelectronics plc Westfield House 26 Westfield Road Edinburgh EH11 2QB United Kingdom
Tel :: +44 (0)131 272 7000 Fax :: +44 (0)131 272 7001 Email :: sales@wolfsonmicro.com
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